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Orcad Demonstration Program
Insight-Memec Xilinx Fpga Development Board
Free C-compiler/assembler from Keil.com
Licensees of the e8051 receive a complete example design for an embeddable
microcontroller incorporating the e8051 core, plus full documentation. The design is
straightforward for the user to modify to suit his own project and can be used immediately
on its own for development, or embedded within a larger design.
The Deliverables Project Folder includes the following:
A "Main" folder, containing: |
(a) The main VHDL files required for an example complete, ready-to-use, FPGA/ASIC 8051 microcontroller.
A "TopLevel" folder, containing: |
(a) An example top-level VHDL file for instantiating the main design into an FPGA.
(b) A corresponding testbench.
A "Schematics" folder, containing: |
(a) Example Orcad schematic versions of the main and top-level files. These can be viewed using the free Orcad Demonstration Program; they can be edited and then compiled using Orcad Capture software in the usual way; or they can easily be redrawn in another toolset.
(b) Viewable Microsoft Word and PDF versions of the schematics.
A "Rams" folder, containing: |
(a) Example VHDL Ram files for use in the main design: a Xilinx version for use in Xilinx FPGA implementation and a generic version for use in other vendors' hardware, for general simulation and for synthesis.
A "Roms" folder, containing: |
(a) A simple auto-baud-rate-detecting "bootloader" program in 8051 assembler, which enables an RS232 serial port on the 8051 to receive simple commands. It can also download further .HEX files from a PC into an FPGA development system. Alternatively, the user can write his own boot-up programs to test the core, both in testbench simulation and in the development hardware. The example code can be edited if required, and assembled to .HEX files with the free software from Keil.com.
(b) An executable to generate standard VHDL Rom files from .HEX files produced by any compiler or assembler.
(c) The VHDL Rom file generated from the bootloader program.
An "e8051core" folder, containing:|
(a) Either the e51_256.VHD restricted core, or the e51_FULL.VHD core as per licence, to be used in the main design. Upgrading from 256 to FULL simply requires substitution of one file for the other.
A "Sundry" folder containing:|
(a) A sample .UCF file. The Xilinx development system requires this or a similar file to define pin numbers and pin properties on the appropriate FPGA. The user can provide his own files for different environments. The supplied file can be used with the Insight-Memec Xilinx Fpga Development Board to connect the microcontroller output pins to the board debug headers, to the RS232 interface, and to the seven-segment display drivers.